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RX Buffer Pointer / Memory Question
by heedaf on Jul 9, 2008 |
heedaf
Posts: 7 Joined: Jun 23, 2008 Last seen: Aug 12, 2008 |
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I have a basic operational question with the receive buffer pointer and
memory. When the core is receiving packets and sends the data to memory how does it know where to place it. My guess is that it places the memory into specific locations and it is up to the processor to remove the data before it is full or over written. Is this the case? If someone could let me know how this operation works I would be greatly appreciative. Thanks, DeWayne |
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RX Buffer Pointer / Memory Question
by Unknown on Jul 10, 2008 |
Not available! | ||
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You can get this information by reading the user manual for the
ethmac. Basically the MAC uses descriptors to control the DMA
controllers. There are several fields in the descriptor that instruct
the MAC's DMA controllers what to do. Essentially the processer loads
a memory address into the descriptor. Then it sets a bit in the
descriptor to indicate to the DMA controller that the descriptor is
valid and ready for use. When the MAC receives a packet and transfers
the data to the specified memory address it clears the bit in the
descriptor to indicate to the processor that it has finished the
transfer. The MAC's DMA controller will not do anything with that
descriptor until the processor sets the valid bit.
If an RX packet comes in and there is no valid descriptor for the MAC
to use, the packet will be buffered. If the buffer fills up,
subsequent packets will be discarded.
Jake
On Wed, Jul 9, 2008 at 3:57 PM, heedaf at excite.com> wrote:
I have a basic operational question with the receive buffer pointer and
memory. When the core is receiving packets and sends the data to
memory how does it know where to place it. My guess is that it places
the memory into specific locations and it is up to the processor to
remove the data before it is full or over written. Is this the case?
If someone could let me know how this operation works I would be
greatly appreciative.
Thanks,
DeWayne
_______________________________________________
http://www.opencores.org/mailman/listinfo/ethmac
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RX Buffer Pointer / Memory Question
by heedaf on Jul 10, 2008 |
heedaf
Posts: 7 Joined: Jun 23, 2008 Last seen: Aug 12, 2008 |
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So the external processor tells the ethmac core where to place
incoming data into memory and this is done for each incoming backet?
Also, I've also been trying to find the Receive Pointer Register (RXPNT)
but I can't find it anywhere. Do you know what module it is located in?
Thanks again,
DeWayne
----- Original Message -----
From: Jakob Jonesjrjonsie at g...>
To:
Date: Thu Jul 10 17:48:17 CEST 2008
Subject: [ethmac] RX Buffer Pointer / Memory Question
You can get this information by reading the user manual for the
ethmac. Basically the MAC uses descriptors to control the DMA controllers. There are several fields in the descriptor that instruct the MAC's DMA controllers what to do. Essentially the processer loads a memory address into the descriptor. Then it sets a bit in the descriptor to indicate to the DMA controller that the descriptor is valid and ready for use. When the MAC receives a packet and transfers the data to the specified memory address it clears the bit in the descriptor to indicate to the processor that it has finished the transfer. The MAC's DMA controller will not do anything with that descriptor until the processor sets the valid bit. If an RX packet comes in and there is no valid descriptor for the MAC to use, the packet will be buffered. If the buffer fills up, subsequent packets will be discarded. Jake On Wed, Jul 9, 2008 at 3:57 PM, wrote:
> I have a basic operational question with the receive buffer
pointer and
> memory. When the core is receiving packets and sends the data
to
> memory how does it know where to place it. My guess is that it
places
> the memory into specific locations and it is up to the
processor to
> remove the data before it is full or over written. Is this the
case?
> If someone could let me know how this operation works I would
be
> greatly appreciative.
> Thanks,
> DeWayne
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/ethmac
>
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RX Buffer Pointer / Memory Question
by Unknown on Jul 11, 2008 |
Not available! | ||
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They are located in the RAM. Not in registers.
Regards,
Igor
On 7/10/08, heedaf at excite.com heedaf at excite.com> wrote:
So the external processor tells the ethmac core where to place
incoming data into memory and this is done for each incoming backet?
Also, I've also been trying to find the Receive Pointer Register (RXPNT)
but I can't find it anywhere. Do you know what module it is located in?
Thanks again,
DeWayne
----- Original Message -----
From: Jakob Jonesjrjonsie at g...>
To:
Date: Thu Jul 10 17:48:17 CEST 2008
Subject: [ethmac] RX Buffer Pointer / Memory Question
You can get this information by reading the user manual for the
_______________________________________________
http://www.opencores.org/mailman/listinfo/ethmac
ethmac. Basically the MAC uses descriptors to control the DMA controllers. There are several fields in the descriptor that instruct the MAC's DMA controllers what to do. Essentially the processer loads a memory address into the descriptor. Then it sets a bit in the descriptor to indicate to the DMA controller that the descriptor is valid and ready for use. When the MAC receives a packet and transfers the data to the specified memory address it clears the bit in the descriptor to indicate to the processor that it has finished the transfer. The MAC's DMA controller will not do anything with that descriptor until the processor sets the valid bit. If an RX packet comes in and there is no valid descriptor for the MAC to use, the packet will be buffered. If the buffer fills up, subsequent packets will be discarded. Jake On Wed, Jul 9, 2008 at 3:57 PM, wrote:
> I have a basic operational question with the receive buffer
pointer and
> memory. When the core is receiving packets and sends the data
to
> memory how does it know where to place it. My guess is that it
places
> the memory into specific locations and it is up to the
processor to
> remove the data before it is full or over written. Is this the
case?
> If someone could let me know how this operation works I would
be
> greatly appreciative.
> Thanks,
> DeWayne
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/ethmac
>
|
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RX Buffer Pointer / Memory Question
by Unknown on Jul 11, 2008 |
Not available! | ||
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You need to read the specifications document "eth_speci.pdf". All
information pertaining to a DMA transfer to/from the MAC is stored in
a descriptor. There are 128 total descriptors available. The
descriptors are stored in memory internal to the MAC core. The
"eth_speci.pdf" document details which bits of the descriptors perform
what functions (including the RX pointer).
On Thu, Jul 10, 2008 at 1:49 PM, heedaf at excite.com> wrote:
So the external processor tells the ethmac core where to place
incoming data into memory and this is done for each incoming backet?
Also, I've also been trying to find the Receive Pointer Register (RXPNT)
but I can't find it anywhere. Do you know what module it is located in?
Thanks again,
DeWayne
----- Original Message -----
From: Jakob Jonesjrjonsie at g...>
To:
Date: Thu Jul 10 17:48:17 CEST 2008
Subject: [ethmac] RX Buffer Pointer / Memory Question
You can get this information by reading the user manual for the
_______________________________________________
http://www.opencores.org/mailman/listinfo/ethmac
ethmac. Basically the MAC uses descriptors to control the DMA controllers. There are several fields in the descriptor that instruct the MAC's DMA controllers what to do. Essentially the processer loads a memory address into the descriptor. Then it sets a bit in the descriptor to indicate to the DMA controller that the descriptor is valid and ready for use. When the MAC receives a packet and transfers the data to the specified memory address it clears the bit in the descriptor to indicate to the processor that it has finished the transfer. The MAC's DMA controller will not do anything with that descriptor until the processor sets the valid bit. If an RX packet comes in and there is no valid descriptor for the MAC to use, the packet will be buffered. If the buffer fills up, subsequent packets will be discarded. Jake On Wed, Jul 9, 2008 at 3:57 PM, wrote:
> I have a basic operational question with the receive buffer
pointer and
> memory. When the core is receiving packets and sends the data
to
> memory how does it know where to place it. My guess is that it
places
> the memory into specific locations and it is up to the
processor to
> remove the data before it is full or over written. Is this the
case?
> If someone could let me know how this operation works I would
be
> greatly appreciative.
> Thanks,
> DeWayne
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/ethmac
>
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